Electronics is dominated nowadays by microelectronic components with integrated circuits. Such integrated circuits comprise a complex arrangement of electronic structures which are interconnected in a plurality of planes arranged one above the other on a common semiconductor substrate, also referred to as chip. The fabrication of these circuits is characterized by a complicated succession of different process steps.
One of the principle requirements of the semiconductor industry is the continuous increase in performance as a result of ever faster circuits, which is linked with the miniaturization of the electronic structures. In the course of this development, a transition has been made to arranging the structures during the production of the chips on a semiconductor wafer in part for example in etching trenches etched into the semiconductor wafer, so that, as buried structures, they take up less space on the surface of the semiconductor wafer.
The miniaturization of the electronic structures is accompanied by an increase in the requirements made of the precision of the fabrication processes used. At the same time, precise measurement methods are relied on in order to determine the exact position and also the precise geometrical extent of the structures. In this case, the determination of the depth of buried structures, in particular, is accorded great importance since this parameter may have a significant influence on the functionality of the circuits.
In order to determine the depth of a buried structure, it is known to break the semiconductor wafer in the region of said structure and to examine the break edge with the aid of a scanning electron microscope. The image of the break edge that is recorded thereby can be used to determine the depth of the buried structure.
However, this method turns out to be complicated and laborious due to the required breaking of the semiconductor wafer. Furthermore, the semiconductor wafer is destroyed by being broken, as a result of which the method is extremely cost-intensive. Furthermore, since the method cannot be applied to the product wafers which continue in production, deviations may occur between the measured depth of a structure and the depth of a corresponding structure of a product wafer.
As an alternative, in order to determine the depth of a buried structure, it is indeed known to estimate the depth indirectly by way of the etching rates determined during the etching of comparable structures into planar test wafers. It is also correspondingly the case with this method that it does not measure the depths of structures at the product wafers, so that the estimated values may deviate from the depths of the structures in product wafers.